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PIN CONNECTIONS
PIN CONNECTIONS
PHASEA
PGND
EN1
EN2
RST
N/C
PUMP
VPUMP
VSUP
PHASEB
PHASEC
PA_HS
1
2
3
4
5
6
7
8
9
10
11
12
54
53
52
51
50
49
48
47
46
45
44
43
VPWR
N/C
N/C
VLS
N/C
N/C
PA_BOOT
PA_HS_G
PA_HS_S
PA_LS_G
PA_LS_S
PB_BOOT
Transparent
Top View
PA_LS
VDD
PB_HS
PB_LS
I NT
CS
SI
SCLK
SO
PC_LS
PC_HS
AMP_OUT
AMP_N
AMP_P
OC_OUT
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
42
41
40
39
38
37
36
.35
34
33
32
31
30
29
28
PB_HS_G
PB_HS_S
PB_LS_G
PB_LS_S
PC_BOOT
PC_HS_G
PC_HS_S
PC_LS_G
PC_LS_S
N/C
VLS_CAP
GND1
GND0
VSS
OC_TH
Figure 3. 33937A Pin Connections
Table 1. 33937A Pin Definitions
A functional description of each pin can be found in the Functional Pin Description section beginning on page 20 .
Pin
1
Pin Name
PHASEA
Pin Function
Digital Output
Formal Name
Phase A
Definition
Totem Pole output of Phase A comparator. This output is low when the
voltage on PA_HS_S (Source of High Side FET) is less than 50% of V SUP
2
3
PGND
EN1
Ground
Digital Input
Power Ground
Enable 1
Power ground for charge pump
Logic signal input must be high (ANDed with EN2) to enable any gate drive
output.
4
EN2
Digital Input
Enable 2
Logic signal input must be high (ANDed with EN1) to enable any gate drive
output
5
6, 33, 49,
RST
N/C
Digital Input
–
Reset
No Connect
Reset input
Do not connect these pins
50, 52, 53
7
PUMP
Power Drive
Pump
Charge pump output
Out
8
9
VPUMP
VSUP
Power Input
Analog Input
Voltage Pump
Supply Voltage
Charge pump supply
Supply voltage to the load. This pin is to be connected to the common
Drains of the external High Side FETs
10
PHASEB
Digital Output
Phase B
Totem Pole output of Phase B comparator. This output is low when the
voltage on PB_HS_S (Source of High Side FET) is less than 50% of V SUP
11
PHASEC
Digital Output
Phase C
Totem Pole output of Phase C comparator. This output is low when the
voltage on PC_HS_S (Source of High Side FET) is less than 50% of V SUP
33937A
Analog Integrated Circuit Device Data
Freescale Semiconductor
3
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